The OpenROAD Project Documentation

The OpenROAD Project aims at providing a 24-hour, no-human-in-the-loop layout design for SoC, package and PCB with no Power-Performance-Area (PPA) loss.

This page contains all related documentation for the different tools being developed under OpenROAD, in addition to RTL-to- GDS flow automation.

Project Questions

Contact Prof. Andrew B. Kahng at abk-openroad@eng.ucsd.edu